This invention relates to a polycrystalline silicon (polysilicon) resistor which is useful as a low resistance resistor in semiconductor integrated circuits and a method of producing the resistor.
In conventional semiconductor integrated circuits, resistors are usually made by patterning a planar and homogeneous film of polysilicon which is deposited on a dielectric film and is doped with an impurity such as phosphorus or boron.
In the accompanying drawings, FIGS. 8 and 9 show a conventional polysilicon resistor. A dielectric film 52 is formed on a semiconductor substrate 50, and a rectangular pattern of a doped polysilicon film 54 is formed on the dielectric film 52. The dielectric film 52 and the polysilicon film 54 are overlaid with another dielectric film 56. A pair of contact windows 60 are opened in the dielectric film 56, and aluminum contacts 62 are provided by using the contact windows 60. The resistance (R) of this resistor depends on the dopant concentration in the polysilicon film 54 and the dimensions of the patterned polysilicon film, the thickness (D), width (W) and the effective length (L). The resistance R is given by the equation (1). EQU R=.rho.L/WD=.rho..sub.s L/W (1)
where .rho. is the resistivity of the film 54, and .rho..sub.s is the sheet resistance of the film 54.
To increase the resistance R, it is conceivable to enhance the resistivity of the polysilicon film by lowering the dopant concentration. However, if the polysilicon film is very lightly doped, the temperature dependence of the resistivity is substantially increased. The resistance R can be increased by increasing the length L of the resistor, but in this case the resistor occupies an increased area.
JP-A 63-229744 (1988) shows a polysilicon resistor which can have a high resistance value without increasing the resistor area. FIGS. 10 and 11 of the accompanying drawings show a resistor according to JP-A 63-229744. A dielectric film 52 is formed on a semiconductor substrate 50, and slots 58 in a parallel arrangement are formed in the dielectric film 52 by anisotropic etching. A polysilicon film 54 is deposited on the dielectric film 52 including the dielectric surfaces in the slots 58, and an impurity is introduced into the polysilicon film 54. The doped polysilicon film 54 is selectively etched to form a rectangular resistor pattern which traverses the slots 58. After that, another dielectric film 56 is deposited over the dielectric film 52 and the polysilicon film 54, and contact windows 60 for aluminum contacts 62 are opened in the dielectric film 56. In this resistor, the effective length of the polysilicon film is increased by using the surfaces in the slots 58 instead of increasing the distance between the two contacts 62.
To lower the resistance R of a polysilicon resistor, the resistivity of the polysilicon film is lowered by increasing the dopant concentration in the film. However, there is a limit to the lowering of resistivity by this method because when the dopant concentration exceeds the solid solubility limit the excess dopant segregates at the grain boundaries. Also there is a limit to shortening of the effective length of the patterned polysilicon film since the possible minimum length is determined by the resolution of photolithography for patterning the contact windows 60 in FIG. 8. It is undesirable to enlarge the width of the patterned polysilicon film because the resistor occupies an increased area.
JP-A 57-88757 (1982) shows a method of transforming a polysilicon film into a single crystal silicon film in producing a conductor pattern including a resistor region and interconnect regions. One reason for this transformation is that the single crystal silicon film provides much lower in resistivity than the polysilicon film.
FIG. 12 of the accompanying drawings illustrates an example in JP-A 57-88757. A dielectric film 74 is formed on a p-type silicon substrate 70 in which n-type regions 72 are formed. Contact windows 78 and a number of parallel grooves 76 are formed in the dielectric film 74. A polysilicon film 80 is deposited on the dielectric film 74 so as to fill the grooves 76 and contact windows 78, and the polysilicon film is patterned by photolithography and subsequent etching to form a pattern including a resistor region 80a, interconnect regions 80b and contact regions 80c. Then, an impurity is introduced into the polysilicon film 80 by ion implantation. In the resistor region 80a the impurity concentration is regulated according to the aimed resistance value. In the interconnect regions 80b and contact regions 80c the impurity concentration is made higher so as to slightly exceed the solid solubility limit. After that, the resistor region 80a and interconnect regions 80b of the doped polysilicon film are irradiated with a high-density energy beam such as a laser beam or an electron beam to activate the implanted impurity and to transform polysilicon in these regions 80a, 80b into single crystal silicon. At this stage the grooves 76 provide artificial nuclei for crystal growth. In consequence, the resistor region 80a of the silicon film is transformed into a relatively high resistance region of single crystal silicon film, and the interconnect regions 80b are transformed into low resistivity regions of single crystal silicon film. In the contact regions 80c, the low resistivity polysilicon film remains unchanged.
The method according to JP-A 57-88757 may be used to produce a silicon resistor having a very low resistance value. However, from a practical point of view this method is not favorable because of the intricacy of irradiating the polysilicon film with a high-density energy beam.